As conventional semiconductor switches, a FET switch that uses a difference between a "on" resistivity and a "off" resistivity in a FET, and a PIN diode switch that uses a difference between a "on" resistivity and a "off" resistivity in a PIN diode are known. Both of these switches are using a difference between a "on" resistivity and a "off" resistivity in a semiconductor device.
The FET switch is popular with recent mobile communication terminal equipments because of its low consumed current and easiness of integration.
Here, the principle of FET switch operation will be explained in FIG. 1.
In FIG. 1, gates of FET 50 and FET 53 are connected through resistors 43, 46 to a control terminal 60, and gates of FET 51 and FET 52 are connected through resistors 44, 45 to a control terminal 61. The respective FETs maybe of the depletion type or enhancement type. Herein, depletion type of FETs are used.
A pinch-off voltage of the FETs 50, 51, 52, 53 is set to be V.sub.p. When control voltages are applied namely, V.sub.c1 =0V, V.sub.c2 &lt;V.sub.p, where the voltage V.sub.c1 is applied at the control terminal 60 and the voltage V.sub.c2 is applied at the control terminal 61 capital "V" represents voltage and superscript lowercase "c" represents control voltage, FET 50 and FET 53 are turned on and FET 51 and FET 52 are turned off. In this case, drain-to-source resistivities of FET 50 and FET 53 become low and drain-to-source resistivities of FET 51 and FET 52 become high. Therefore, an input signal into an input terminal 1 is output from an output terminal 2.
On the contrary, when getting V.sub.c1 &lt;V.sub.p, V.sub.c2 =0V, drain-to-source resistivities of FET 50 and FET 53 become high and drain-to-source resistivities of FET 51 and FET 52 become low. Therefore, an input signal into the input terminal 1 is output from the output terminal 3.
FET 52 and FET 53 serve to improve the isolation of the output terminals 2 and 3. Namely, a leakage signal is dropped to ground by grounding to the turned-off terminal with the low resistivity.
As described above, by alternately switching the voltage V.sub.c1 of the control terminal 60 and the voltage V.sub.c2 of the control terminal 61, an input signal is output switching the output terminal 2 or 3. Meanwhile, 30, 31 and 32 in FIG. 1 are DC blocking capacitors.
However, the FET switch in FIG. 1 needs two control terminals, therefore complicating the control circuit composition.
To solve this problem, a PIN diode switch as shown in FIG. 2 has been suggested, where a difference between "on" and "off" resistivities of the PIN diode is used.
In the PIN diode switch, when a voltage is applied to a control terminal 4 so as to turn on PIN diodes 54, 55, both the PIN diodes 54, 55 have a low resistivity.
In this circuit, between the input terminal 1 and the PIN diode 54, a distributed constant transmission circuit(.lambda./4 transmission line 70) which have 1/4 wavelength at a working frequency is connected. When the PIN diode 54 has a low resistivity, an impedance on the side of the PIN diode 54 becomes higher by viewing from the input terminal 1. Therefore, an input signal is output from the output terminal 3.
When a voltage is applied to the control terminal 4 so as to turn off the PIN diodes 54, 55, both the PIN diodes 54, 55 have a high resistivity. Therefore, an input signal is output from the output terminal 2.
Thus, the switch operation is conducted by using a resistivity difference between "on" and "off" of the PIN diodes and the .lambda./4 transmission line 70. Meanwhile, 30, 31 and 32 in FIG. 2 are DC blocking capacitors, and 40 and 47 are resistivities.
On the other hand, Japanese patent application laid-open No. 7-312543 (1995) discloses a conventional high-frequency switch circuit as shown in FIG. 3, where a varactor diode (variable capacitance diode) is used.
As shown in FIG. 3, the conventional high-frequency switch circuit is composed of a diode switch circuit including PIN diodes 56, 57 and resistors 40, 48 and 49, and a filter circuit including a varactor diode 58 and a capacitor 24. Meanwhile, in FIG. 3, 1 is an input terminal, 2 is an output terminal, 4 is a control voltage terminal and 33, 34 are DC blocking capacitors.
In this circuit, the varactor diode 58 is used only for a resonance circuit composing the filter circuit. Namely, the switching is, like the circuit in FIG. 2, conducted by using "on" and "off" resistivities of the PIN diodes 56, 57.
As described above, the FET switch in FIG. 1 needs two control terminals, therefore complicating the control circuit composition, and further it must have many terminals, therefore the size is difficult to reduce in case of its integration (First Problem).
Also, the PIN diode switch in FIG. 2 needs a certain amount of current to flow, therefore it is not suitable for mobile communication terminal equipments where lower consumed power is required (Second Problem).
Moreover, this switch uses, as shown in FIG. 2, the distributed constant transmission circuit(.lambda./4 transmission line 70), therefore increasing the entire area and size and giving a costly IC (Third Problem).